The fabrication of integrated circuits for logic products typically includes a baseline process for the production of metal-oxide-semiconductor field-effect transistors (MOSFETs). Thicknesses, geometries, alignment, concentrations, etc. are stringently controlled for each operation in such a baseline process to ensure that they are within specific tolerance ranges so that the resultant MOSFETs will function properly. For applications such as system-on-chip silicon-oxide-nitride-oxide-semiconductor (SONOS) FETs are often integrated into a MOSFET logic manufacturing process. This integration can seriously impact the baseline MOSFET process, and generally requires several mask sets and expense.